Selection of LDO power suppression ratio and noise in RF circuit
Introduction
portable product power design requires system level thinking. When developing battery powered equipment, such as low-power products such as, MP3, PDA, PMP, DSC, if the power system design is unreasonable, it will affect the architecture of the whole system, product characteristic combination, component selection, software design and power distribution. Similarly, in the system design, we should also consider more from the perspective of saving battery energy. A linear regulator with a low differential pressure (LDO) is a good choice
power requirements for RF circuits
most RF circuits of cellular baseband chipsets need three sets of power supplies: to meet the needs of digital circuits, analog circuits and peripheral interface circuits. The typical value of the digital circuit supply voltage of the baseband processor is 1.8V to 2.6V. Generally, the Li ion battery will be turned off when the voltage drops to 3.2v-3.3v. The LDO has a voltage difference of at least 500 to 600mV, and the requirement for the voltage difference is not high. In addition, the digital circuit itself does not have high requirements for LDO output noise and PSRR (power supply rejection ratio), and only requires very low quiescent current under light load conditions
the typical supply voltage of analog circuit inside baseband processor is 2.4V to 3.0V, and the voltage difference is 200mV to 600mV. LDO is required to have high low-frequency (217hz for GSM) ripple suppression ability, eliminate the battery voltage ripple generated by RF power amplifier, and also need low quiescent current index
the typical supply voltage of the receiving and transmitting parts of RF circuit is 2.6V to 3.0V, in which low noise amplifier (LNA), mixer, phase locked loop (PLL), voltage controlled oscillator (VCO) and intermediate frequency (if) circuit need LDO with low noise and high PSRR. In practical application, the performance of VCO and PLL circuits directly affects the RF circuit indexes, such as the purity of transmission spectrum, the selectivity of receiver, the noise of analog transceiver, the phase error of digital circuit and so on. The noise will change the phase frequency and amplitude frequency characteristics of the oscillator. At the same time, the oscillator loop will further amplify the noise, which may modulate the carrier
noise and power rejection ratio of LDO
LDO is a low dropout linear regulator with low power consumption. It has very low own noise and high power rejection ratio. The block diagram of linear regulator is shown in Figure 1
Figure 1 block diagram of linear voltage regulator
PSRR is an AC parameter reflecting the ability of LDO output to suppress input ripple under the condition of the same output and input frequency. It is different from noise, which usually refers to interference in the frequency range of 10Hz to 100kHz. The expression of PSRR (DB) is as follows:
PSRR = 20log (△ VIN/△ VOUT) (1)
Figure 2 input and output changes of linear voltage regulator
Figure 2 shows the output and input voltage change curve of sgm2007 when CBP = 0.01mf, Iload = 50mA, cout = 1mf, f = 10kHz
from equation (1), PSRR = 20log (△ VIN/△ VOUT) = 60 (DB). When the input changes by 1V, the output changes by 1mV. It can be seen that the ripple suppression ability of LDO is still very strong
The output noise ofLDO is affected by its internal design, external bypass and compensation circuit. As shown in Figure 1, the main source of LDO output noise is the reference source, and the noise generated by the reference is amplified at the output end. The expression of output noise VN is as follows:
VN = (R1 + R2)/r2 VREF (2)
reference source bypass capacitance CBP can affect the reference noise, and increasing the bypass capacitance can reduce the reference noise. The typical value of ceramic capacitor recommended is 470pf to 0.01mf. The bypass capacitance will affect the rising speed of LDO output voltage. The larger the bypass capacitance, the slower the rising speed of output voltage. Pay attention to it when using
other factors affecting LDO output noise include the internal poles, zeros, output poles and load of LDO. Increasing the capacity of the output capacitor or reducing the output load is conducive to reducing the high-frequency output noise. Figure 3 shows the influence of bypass capacitor CBP on the output noise of sgm2007
Figure 3 Influence of reference bypass capacitance on output noise value
Figure 4 shows the influence of reference bypass capacitance on sgm2007psrr. It can be seen that increasing bypass capacitance will increase the value of PSRR at a certain frequency
Figure 4 Influence of reference bypass capacitance on PSRR value
LDO needs to connect external input and output capacitors. High capacity capacitors with low equivalent series resistance (ESR) can generally improve the PSRR, noise and transient response of the power supply. Many customers of ceramics buy electronic universal experiment. Electromechanical container is usually the first choice because its price is low and its fault mode is open circuit. In contrast, tantalum capacitor is more expensive and its fault mode is short circuit. The ESR of output capacitor will affect its stability. Ceramic capacitor has low ESR, about 10m. When using ceramic capacitors, it is recommended to use X5R and X7R dielectric materials, which will play a good role in promoting the global influence of the exhibition, because they have good temperature stability. Figure 5 and Figure 6 show the influence of output capacitance cout on sgm2007 output noise and PSRR respectively. It can be seen that large capacitors generally reduce the output noise and increase the PSRR value in a certain frequency range
the number of output experiments in Figure 6 limits the influence of capacitance on PSRR value
conclusion
when selecting LDO for RF circuit, carefully compare the noise index and PSRR to ensure that the reference bypass capacitance, output capacitance and load conditions are consistent. The output noise of sgm2007 low dropout linear regulator of Shengbang microelectronics company is 30mV (RMS) in the frequency range of 10Hz to 100kHz, and the PSRR is up to 73db at the frequency of 1kHz. It can provide low noise, high power ripple rejection ratio and fast transient response for the power supply of noise sensitive analog circuits such as RF receiver and transmitter, voltage controlled oscillator and audio amplifier. Moreover, the input voltage of sgm2007 is between 2.5V and 5.5V, which is suitable for Bluetooth digital cameras and personal digital assistants, as well as single lithium battery powered or fixed 3.3V and 5V systems such as wireless and high-end audio products
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